An ESD protection circuit is used to protect an internal circuit of a semiconductor device against surges generated when an ESD occurs at, for example, a power-supply terminal. In the ESD protection circuit, when a voltage surge is detected as an increase in voltage on a power-supply line, a shunt metal-oxide semiconductor (MOS) transistor connected between the power-supply line and a grounding line is brought into a conduction state, so that electric charge associated with the surge is directed to the grounding line. An RC trigger circuit can be used to detect an increase in voltage caused by a surge and to bring the shunt MOS transistor into a conduction state. The RC trigger circuit generates a trigger signal at a junction between a series connected resistor and a capacitor.
While it is generally preferred that a shunt transistor which is to be in an ESD protection circuit have a large driving force, the larger the driving force, the larger the leakage current becomes and, thus, the higher the power consumption of a semiconductor device becomes. On the other hand, when the power consumption of a semiconductor device is lowered by limiting leakage current, the driving power for the shunt transistor drops and the discharge performance of the ESD protection circuit is lowered, so that the shunt transistor may be damaged during operation. It is desirable to reduce power consumption while maintaining the discharge performance of the ESD protection circuit.